True Real Time - Mass Computing - Reprogrammable Where SPEED, LOW LATENCY, massive PARALLEL COMPUTING capacity, FLEXIBILITY (re-programmable), DETERMINISM and SECURITY are a must. GENERA Technologies is a pioneer in the development of FPGA-based systems for high-performance applications with requirements of ultra-low latency, high speed, high parallel computational capacity and adaptability, for the following markets: Military Communications, Nanotechnology, Space and Manufacturing Industry
FPGA-based HW Definition and Design
We offer a full service of FPGA-based embedded solutions. From initial conception to final product commissioning. Definition and design of the HW architecture:
Definition of requirements.
Definition of HW implementation architecture.
Custom or Off-the-Shelf hardware solutions.
High frequency communication wiring.
Feeding stage design.
Design of test benches.
Multilayer PCB design
FPGA-based HW Development
GENERA Technologies has the knowledge, experience and infrastructure to provide FPGA solutions based on the latest technology and highly stable development tools necessary for the comprehensive management of design projects with FPGAs and SoC embedded systems:
Definition of specifications
Definition of the deployment architecture.
Definition of communications.
Detail implementation and FPGA / System on Chip development.
Integration of IP cores.
Verification and Validation.
Drafting of documentation.
Monitoring of the quality system.
Applications
We develop configurable and reliable FPGA-based embedded systems for the following applications:
Software Defined Radio (SDR)
True Real-Time data acquisition (ADC/DAC) and control (PWM, PID)
On board digital telecommunication payload (transparent, regenerative)
High Throughput Processor
Bus serial protocols (CAN, CANopen; MIL-1553)
Switches, FFT functions
Low latency communication protocols
Real hardware security (updateble like a software)
XMSS post-quantum authentication algorithm
In-field configurable devices/cards/systems
Product assurance
Our designs are developed with regard space product assurance technical procedures issued by European Cooperation for Space Standardization.
Cost and Schedule Management
System engineering โ Testing
Software product assurance
System engineering โ Technical requirements specifications
Control engineering handbook
Organization and Conduct of Reviews
System engineering โ Verification
ASIC and FPGA development
Hardening techniques and f
ault management
for TID and SEU effects mitigation in systems with FPGA